Month: October 2019

Abstract: This talk will demonstrate how model checking based verification of compilers and runtime systems can increase the confidence of parallel execution of programming languages, using two case studies. As HPC systems continue to increase in scale, their mean time between failure decreases meaning reliability has become a major concern. I will present HdpH-RS, a … Rob Stewart (Heriot-Watt University): Reliable Parallel Computing using Model Checking

Abstract: It is well known that older adults continue to lag behind younger adults in terms of their breadth of uptake of digital technologies, amount and quality of engagement in these tools and ability to critically engage with the online world. Can these differences be explained by older adults’ distrust of digital technologies? Is trust, … Bran Knowles (Lancaster University): Understanding older adults’ distrust of digital technology

Abstract: Two important aspects in hardware design are the safe routing of signals between modules, and ensuring that ports are correctly connected. Well-known hardware description languages such as SystemVerilog, provide nominal checking over these aspects. Thus, leaving correctness checks over module orchestration to be performed post-design-time using static analyses, testing, and during synthesis. Using a … Jan De Muijnck-Hughes (University of Glasgow): LightClick: A Linear Typed Orchestration Language for System-On-A-Chip Designs