- When: 19th November 2019 14:00 - 15:00
- Where: Cole 1.33b
- Series: School Seminar Series
- Format: Seminar
This talk will demonstrate how model checking based verification of compilers and runtime systems can increase the confidence of parallel execution of programming languages, using two case studies.
As HPC systems continue to increase in scale, their mean time between failure decreases meaning reliability has become a major concern. I will present HdpH-RS, a parallel HPC language. HdpH-RS has a formal semantics, and a fault tolerant work stealing scheduler that has been verified with the SPIN model checker. At embedded scale, program transformations on stateful dynamic code can introduce bugs, race conditions and deadlock. I will present a parallel refactoring tool for the CAL dataflow language. It is integrated with the TINA model checker that we use to identify parallelisable cyclo-static actors in dynamic dataflow programs.
The broader aim of this work is to integrate automated formal verification into parallelising compilers and parallel runtime systems for heterogeneous architectures.
Speaker bio: Dr Rob Stewart is an Assistant Professor at Heriot-Watt University. He’s interested in formalising, verifying and implementing dataflow, functional and domain specific programming languages for manycore architectures and programmable hardware.