Author: Özgür Akgün

Constraint Programming research group at the CP2024 conference

The 30th International Conference on Principles and Practice of Constraint Programming (CP2024) was held in Girona, Catalonia during the first week of September. The CP conference series are the main event for researchers in constraint programming to get together, share latest developments and for networking. 

Our School contributed to the conference in large numbers this year. 

  • Ian Gent was the invited speaker on the conference’s first day, with his talk entitled “Solving Patience and Solitaire Games with Good Old Fashioned AI” (abstract) (video recording).  
  • Christopher Stone was invited to the discussion panel ‘Have Chatbots Reached the Holy Grail?’ at the same workshop and presented the paper: Ian Miguel, András Z. Salamon, Christopher Stone, Automating Reformulation of Essence Specifications via Graph Rewriting (paper) 
  • Özgür Akgün was the Diversity, Equity and Inclusion chair of the conference and presented the DEI initiatives to all the attendees (video recording).
  • We presented several papers at ModRef 2024, the 23rd workshop on Constraint Modelling and Reformulation: 
  • Csobán Balogh, Ruth Hoffmann and Joan Espasa, Towards Understanding Differences Between Modelling Pipelines: a Modelers Perspective (paper) (slides) 
  • Joan Espasa Arxer, Ian Gent, Ian Miguel, Peter Nightingale, András Z. Salamon and Mateu Villaret, Cross-Paradigm Modelling: A Case Study of Puzznic (paper) 
  • Carla Davesa Sureda, Joan Espasa Arxer, Ian Miguel and Mateu Villaret Auselle, Towards High-Level Modelling in Automated Planning (paper)
  • Nguyen Dang, Ian Gent, Peter Nightingale, Felix Ulrich-Oltean and Jack Waller, Constraint Models for Relaxed Klondike Variants (paper) (slides)
    • Jack Waller (who is an undergraduate student at St Andrews!) presented this work.
  • Alessio Pellegrino, Özgür Akgün, Nguyen Dang, Zeynep Kiziltan and Ian Miguel, Automatic Feature Learning for Essence: a Case Study on Car Sequencing (paper) (slides) 
    • Alessio Pellegrino (who is a visiting student from University of Bologna) presented this work.
  • Orhan Yigit Yazicilar, Özgür Akgün and Ian Miguel, Automated Nogood-Filtered Fine-Grained Streamlining: A Case Study on Covering Arrays (paper) 
  • Our PhD students Orhan Yigit Yazicilar, Erdem Kus, Carla Devesa Sureda, and Joseph Loughney attended the doctoral program. As part of the doctoral program they presented their work by giving a talk and presenting a poster. In addition, they were assigned a mentor during the conference. 
  • Visiting research student (from University of Bologna) Alessio Pellegrino gave his first talk at the ModRef 2024 workshop. 
  • PhD student Erdem Kus presented the following paper in the technical track of the main conference: 
  • Erdem Kuş, Özgür Akgün, Nguyen Dang, and Ian Miguel, Frugal Algorithm Selection (slides) (video recording)

Finally, here is a group photo of the St Andrews group, standing at the front steps of the beautiful conference venue in Girona. 

Talk by Roberto Castañeda Lozano: Constraint-Based Register Allocation and Instruction Scheduling

Roberto has been part of a very cool project in KTH where they used Constraint Programming to solve a number of compiler problems. He is now working for Edinburgh and we invited him to give us a talk about his research in this area. The talk will be 30 minutes + Q&A. Please come along if you are interested.

Date/time: Oct 30th, 11am

Location: JC 1.33b

Title: Constraint-Based Register Allocation and Instruction Scheduling

Presenter: Roberto Castañeda Lozano – School of Informatics, University of Edinburgh

(joint work with Mats Carlsson, Frej Drejhammar, Gabriel Hjort Blindell, and Christian Schulte at RISE SICS and KTH Royal Institute of Technology in Stockholm, Sweden)

Abstract: This talk presents a constraint-based approach to register allocation and instruction scheduling, two central compiler problems. Unlike conventional heuristic algorithms, constraint programming has the potential to solve these problems optimally and to exploit processor-specific features readily. Our approach is the first to leverage this potential in practice by capturing the complete set of register allocation and instruction scheduling subproblems handled by state-of-the-art compilers, scaling to medium-sized problems, and generating executable code. The approach can be used to trade compilation time for code quality beyond the usual compiler optimization levels, explore and exploit processor-specific features, and identify improvement opportunities in conventional compilers.
More information can be found in Roberto’s doctoral dissertation (https://robcasloz.github.io/publications/TRITA-EECS-AVL-2018-48.pdf) and on the project’s website (http://unison-code.github.io).